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I'm an Electronic Engineer with two years of experience in Design and verification.
I also Have a Masters Degree in Engineering too and good command over my area of expertise.
My area of expertise is RTL (Verilog and System Verilog) Design and Verification. I can also write layered test benches in Verilog and SystemVerilog. I'll do RISC V Assembly programming.
I have a good command in C/C++ and python and can work on Assemblers, Processors, Cache simulators and automation tasks.... Continua a leggere